This invention relates to flip-flops.
Flip-flops are used in VLSI systems to keep signals correlated in time. Modern microprocessors use a large array of flip-flops that are chosen to suit speed and output load requirements. Most microprocessor signal paths are non-critical, and surplus timing use for energy reduction is possible for logic blocks and flip-flops in these paths. As the number of logic gates which lie between signal path flip-flops decrease, the relative impact of the timing delay and energy consumption in the logic gates is reduced, and the relative impact of the timing delay and energy consumption of the flip-flops increases as does the benefit of using low-energy flip-flop designs.
One type of low-energy flip-flop is the master-slave latch pair. As shown in FIG. 1, one such low-energy master-slave latch pair flip-flop is a transmission-gate based flip-flop (TGFF) 10 where n-MOS-only clocked transistors 20, 30 are used to reduce energy consumption. However, on-path inverters 40, 50, which are interrupted by clock signals xe2x80x9cCPxe2x80x9d and xe2x80x9cCNxe2x80x9d 60, 70, respectively, slow down the flip-flop and increase the energy consumed. Also, inverter 90 places a logic level 1 at {overscore (QM)} 100 when input 80 is at logic level 0 and clock signal xe2x80x9cCNxe2x80x9d 70 is activated with a logic level 1. However feedback inverter 110 cannot invert the logic level 1 at {overscore (QM)} 100 due to a logic level 0 at clock signal xe2x80x9cCPxe2x80x9d 60 that disables inverter 110. Therefore inverter 90 is unnecessarily consuming energy by xe2x80x9cpulling-upxe2x80x9d the voltage level at {overscore (QM)} 100.
In another known flip-flop architecture 130, shown in FIG. 2, pull-up transistors of inverters 90, 120 of FIG. 1 are removed, leaving NMOS transistors, to save energy. However, non-interrupted feedback inverters 140, 150 cause excessive short-circuit energy consumption and a longer time delay arising from a contention with the transmission-gates 160, 170. Inverter 180 is not necessary because the input of the inverter 140 can be connected to {overscore (QM)} 190.